发明名称 METHOD OF PRODUCING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 A side-wall insulating film (11) composed of a silicon oxide film is formed on the side wall of a gate electrode (7) (word line WL) to reduce pair word line capacity components as a main component of a bit line capacity. When a silicon oxide film (31) at the upper portion of a contact hole (12) is dry-etched to form a bit line connecting hole in the upper part of the gate electrode's (7) (word line WL) space, a nitride silicon film (19) working as an etching stopper is provided on the lower layer of the silicon oxide film (31) so as to reduce that portion of the bottom of the hole which sinks below the top surface of a cap insulating film (9).
申请公布号 WO02075812(A1) 申请公布日期 2002.09.26
申请号 WO2002JP01003 申请日期 2002.02.07
申请人 HITACHI, LTD.;HITACHI ULSI SYSTEMS CO., LTD.;YAMADA, SATORU;ENOMOTO, HIROYUKI;SAITO, NOBUYA;KAWAGOE, TSUYOSHI 发明人 YAMADA, SATORU;ENOMOTO, HIROYUKI;SAITO, NOBUYA;KAWAGOE, TSUYOSHI
分类号 G11C8/02;H01L21/60;H01L21/768;H01L21/8242;H01L27/10;H01L27/108;(IPC1-7):H01L27/108;H01L21/824 主分类号 G11C8/02
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