The invention relates to an MRAM arrangement in which the selection transistors (5) and the MTJ layer sequences (4) lie parallel to each other in a cell. A considerable space saving can thus be achieved.
申请公布号
WO02059898(A3)
申请公布日期
2002.09.26
申请号
WO2002DE00207
申请日期
2002.01.23
申请人
INFINEON TECHNOLOGIES AG;FREITAG, MARTIN;ROEHR, THOMAS
