Semiconductor device

摘要

The memory cells are arranged to all intersections of the first word line and one line of the bit-line pair and all intersections of the second word line and the other line of the bit-line pair by arranging in parallel the first word line and the second word line consisting of different layers in the row direction with the identical pitch and also alternately arranging the first word line and the second word line at an interval equal to a half of the pitch in the horizontal direction. Moreover, the selection MISFET of the memory cell is formed in the vertical construction and the bit line located at the upper side of the substrate where a channel region is formed is shielded with a conductive film, a part of which forms the gate electrode.