发明名称 SEMICONDUCTOR DEVICE AND ITS TEST METHOD
摘要 A second semiconductor chip receiving an operation instruction from a first semiconductor chip and performing a signal output operation in response to that is mounted on mounting means. An internal wiring connecting the first and the second semiconductor chip and an external terminal connected to the internal wiring are provided on the mounting means so as to constitute a multi-chip module. In this module, a signal route is provided for selectively invalidating operation instructions from the first semiconductor chip to the second semiconductor chip.
申请公布号 WO02075341(A1) 申请公布日期 2002.09.26
申请号 WO2001JP11462 申请日期 2001.12.26
申请人 HITACHI, LTD.;SUGITA, NORIHIKO;ISHIGURO, TETSUO;YASHIKI, NAOKI 发明人 SUGITA, NORIHIKO;ISHIGURO, TETSUO;YASHIKI, NAOKI
分类号 H01L21/822;G01R31/26;G01R31/319;H01L21/66;(IPC1-7):G01R31/28 主分类号 H01L21/822
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