发明名称 |
Leseverstärkeranordnung für eine Halbleiterspeichereinrichtung |
摘要 |
A memory sense amplifier (10) for a semiconductor memory device (1) is provided with a compensation current source device (30) which generates a compensation current (Icomp) and feeds it to an interconnected bit line (4). Said compensation current (Icomp) is selected in such a manner that during readout a potential gradient can be generated and/or maintained in cooperation with a compensation voltage source device (20) on the selected and interlinked bit line device (4) that is substantially constant over time.
|
申请公布号 |
DE10112281(A1) |
申请公布日期 |
2002.09.26 |
申请号 |
DE20011012281 |
申请日期 |
2001.03.14 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
GOGL, DIETMAR;VIEHMANN, HANS-HEINRICH |
分类号 |
G11C11/15;G11C7/06;(IPC1-7):G11C7/06 |
主分类号 |
G11C11/15 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|