发明名称 |
Method for testing memory cell in semiconductor device |
摘要 |
A method for testing a memory cell of the semiconductor device includes the steps of determining a reference memory cell and setting a first trip point by measuring a first drain current of a reference memory cell, testing an erasure verifying memory cell to be tested at a room temperature, detecting a fourth drain current by measuring the erasure verifying memory cell at a hot temperature and comparing the fourth drain current with the first drain current, varying the first drain trip point according to a current difference between the firs and the fourth drain currents and setting a second trip point of the erasure verifying memory cell according to the varied first trip point.
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申请公布号 |
US2002136071(A1) |
申请公布日期 |
2002.09.26 |
申请号 |
US20010028308 |
申请日期 |
2001.12.28 |
申请人 |
YOU YOUNG-SEON;JANG YOON-SOO;LEE MUN-HWA;KIM TAE-KYU |
发明人 |
YOU YOUNG-SEON;JANG YOON-SOO;LEE MUN-HWA;KIM TAE-KYU |
分类号 |
G11C29/00;G11C29/24;G11C29/50;(IPC1-7):G11C7/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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