| 摘要 |
In a computer system having a processor capable of operating at a plurality of performance states, wherein each of the plurality of performance states has an expected processing performance, a system and method is described for switching between the plurality of performance states. A determination is made that a performance state change is needed. The system waits for the processor to enter a quiescent state and, when the processor enters the quiescent state, places the processor in the new performance state.
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