发明名称 Method and apparatus for synchronizing dynamic random access memory exiting from a low power state
摘要 A method and apparatus for exiting a dynamic random access memory from a low power state is provided. The exit from the low power state is first initiated. After the expiration of an exit delay period, a quiet time command is routed through a queue circuit. In one embodiment the use of a bypass circuit allows the interruption of the memory pipeline with a subsequent restart of the pipeline without excessive delay. A flexible clock is delayed by the onset of the quiet time command until the subsequent quiet time event.
申请公布号 US6457095(B1) 申请公布日期 2002.09.24
申请号 US19990458833 申请日期 1999.12.13
申请人 INTEL CORPORATION 发明人 VOLK ANDREW M.
分类号 G11C5/14;G11C7/10;G11C7/20;(IPC1-7):G06F12/00 主分类号 G11C5/14
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