发明名称 MICROCOMPUTER DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a microcomputer device which can appropriately mediate an interruption processing from a plurality of peripheral I/O circuits and can change an appropriate clock and the number of access cycles with respect to the appropriate peripheral I/O circuits and a peripheral memory, and which is adjusted to the clock in accordance with the content of the interruption processing. SOLUTION: An interruption controller circuit 2 is provided with means receiving information PRI1 to 3 on interruption priority from the peripheral I/O circuit 3-13-3. Interruption priority is dynamically varied and the clock CLK to CPU 1 is varied by priority information PRI1 to 3. Then, the peripheral I/O circuit 3-13-3 can be accessed at a bus cycle fitted to the clock CLK.
申请公布号 JP2002269026(A) 申请公布日期 2002.09.20
申请号 JP20010065831 申请日期 2001.03.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KOGA KOICHI;YONAMINE YASUSHI
分类号 G06F13/24;G06F1/06;G06F9/46;G06F9/48 主分类号 G06F13/24
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