| 摘要 |
PROBLEM TO BE SOLVED: To provide a channel write/erase flash memory structure of a flash memory cell, to provide its manufacturing method, and an operating method. SOLUTION: The flash memory cell comprises a first well region of a first conductivity type, a second well region of a second conductivity type located on the first well region, a third well region of the first conductivity type located on the second well region, a first oxide layer on the third well region, a stack structured gate on the first oxide layer, a doped region of the first conductivity type as a drain located on the side face of the stack structured gate under the first oxide layer, a shallow doped region of the second conductivity type located on the side face of the doped region of the first conductivity type under the stack structured gate, and a heavily doped region of the second conductivity type located under the doped region of the first conductivity type and connected to the shallow doped region of the second conductivity type.
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