| 摘要 |
PROBLEM TO BE SOLVED: To enable fast enumeration processing and to suppress influence by bus reset to a necessary minimum. SOLUTION: A cache memory 24 having cache entry parts 241 , 242 ,...24n which are as many as the number of connectable target nodes is connected to a controller 22 provided in a 1394 I/F board 21. An entry for enumeration prepared from contents of a configuration ROM which are once read from each target node is stored in each of the cache entry parts 241 , 242 ,...24n . The entry for enumeration is used for performing enumeration processing in the next bus resetting.
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