A means for fabrication of solenoidal inductors interated in a semiconductor chip is provided. A solenoidal coil (50) is partially embedded in a deep well etched into the chip substrate (10). The non-embedded part (30) of the coil is fabricated as part of BEOL metallization layers (52). This allows for large cross-sectional area of the solenoid turns, tus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The farbication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric (14) followed by fabrication of the part of the coil (22) that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric (24 and 28) and planarization of the same by CMP. After planarization the fabrication of the remaining part (30) of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil, part of it may be built by electrodeposition through a mask on top of the BEOL layers.
