发明名称 |
Integrated memory with two memory regions and data bus |
摘要 |
The two memory regions (1,2) can be written with a datum at a preset address via a coupled data bus (11,12). The datum is applicable to the data bus via a data input circuit (10). Between the data bus and the two memory regions is incorporated a selector (14,15) each.According to the applied address, the selector supplies the datum to the first (1) or second memory region (2). The selector contains two circuits respectively allocated to one memory region. Independent claims are included for an integrated circuit used.
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申请公布号 |
DE10110624(A1) |
申请公布日期 |
2002.09.19 |
申请号 |
DE20011010624 |
申请日期 |
2001.03.06 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
SCHROEGMEIER, PETER;DIETRICH, STEFAN;SCHOENIGER, SABINE;WEIS, CHRISTIAN |
分类号 |
G11C8/12;(IPC1-7):G11C8/12 |
主分类号 |
G11C8/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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