| 摘要 |
A reference circuit (132) for an MRAM array, including logic "1" reference MRAM cells (MR1a) and (MR1b) coupled in parallel with logic "0" reference MRAM cells (MR0a) and (MR0b). The reference current (Iref) is coupled to a measurement resistor (Rm4)of a sense amplifier (130) which is adapted to determine the logic state of an unknown memory cell MCu. |
