SEMICONDUCTOR MEMORY DEVICE OF CAPACITOR OVER BIT LINE STRUCTURE HAVING MIM CAPACITOR AND METHOD FOR FABRICATING THE SAME

摘要

PURPOSE: A semiconductor memory device of a capacitor over bit line structure having an MIM(Metal/high dielectric Insulator/Metal) capacitor and a method for fabricating the same are provided to simplify a fabrication process by performing simultaneously a metal contact forming process and a buried contact forming process. CONSTITUTION: A gate electrode(22) is formed on a semiconductor substrate(10). The first interlayer dielectric(12) is formed on the semiconductor substrate(10). The second interlayer dielectric(14) is formed on the first interlayer dielectric(12). A direct contact(30) and a bit line are formed on the second interlayer dielectric(14). A landing stud for a metal contact(28) is formed on the gate(22). A metal contact hole is formed on a peripheral region. A landing pad for a storage contact node and the metal contact hole are formed on a cell region. A metal contact(24) is formed on the peripheral region and the cell region. Si3N4(16) is deposited on the second interlayer dielectric(14). The third interlayer dielectric(18) is formed thereon. A process for forming an MIM capacitor(26) is performed. The fourth interlayer dielectric(20) is formed thereon. The metal contact(24) is patterned by a photolithography method. The metal contact(28) is opened by performing a dry etching process.