| 摘要 |
A method and apparatus to dynamically set the insertion point of a delay line control shift register based on the current cycle time. A string of delay elements equivalent to the delay elements in a delay lock loop (DLL) are laid out in the opposite direction compared to the DLL delay elements. Both strings of delay elements receive a synchronous input signal such as an external clock signal. The output clock signal of the DLL is phase-shifted relative to the external clock signal such that data removed from a device such as a synchronous dynamic random access memory (SDRAM) device is synchronous with the external clock signal. When a DLL reset command is issued, the information from the string of delay elements is captured and used to set the insertion point of the DLL to the locked or phase-equal point. This allows the DLL to quickly lock on any frequency upon reset of the DLL.
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