发明名称 |
Intermetal dielectric layer for integrated circuits |
摘要 |
An intermetal dielectric structure for integrated circuits and a manufacturing method therefore is provided having a premetal dielectric and a metal line thereon, with a SRO liner on the premetal dielectric layer and the metal lines, a FGS dielectric layer over the SRO liner, a SRO film over the FGS dielectric layer, and a TEOS dielectric layer over the SRO film. Vias through the FGS dielectric layer are treated to have fluorine-free regions around the vias. The structure is not subject to fluorine attack on the metal lines or vias while having a stable FGS dielectric layer with less fluorine out-gassing and out-diffusion.
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申请公布号 |
US2002130418(A1) |
申请公布日期 |
2002.09.19 |
申请号 |
US20020135330 |
申请日期 |
2002.04.29 |
申请人 |
LIU HUANG;SUDIJONO JOHN;TAN JUAN BOON;GOH EDWIN;CUTHBERTSON ALAN;ANG ARTHUR;CHEN FENG;LI QIONG;CHEW PETER |
发明人 |
LIU HUANG;SUDIJONO JOHN;TAN JUAN BOON;GOH EDWIN;CUTHBERTSON ALAN;ANG ARTHUR;CHEN FENG;LI QIONG;CHEW PETER |
分类号 |
H01L21/316;H01L21/768;(IPC1-7):H01L23/52 |
主分类号 |
H01L21/316 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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