| 摘要 |
PURPOSE: A phase frequency detector is provided, which operates under a low power in a high speed, and discriminates a phase difference within two times of a phase and a frequency. CONSTITUTION: The first D-flip flop(21) outputs the first output signal(UP) according to the first input signal, and the second D-flip flop(22) outputs the second output signal(DN) according to the second input signal. And an AND gate(23) is connected between output ports of the first and the second D-flip flop and reset ports, and resets the first and the second D-flip flop with an output signal generated by performing an AND operation of the first and the second output signal. The AND gate comprises two transistors receiving the first and the second output signal as inputs which are connected serially as to the first and the second D-flip flop.
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