Video apparatus, notably video decoder, and process for memory control such an apparatus

摘要

The invention relates to a video apparatus with a digital decoder (6) having a first memory (8) on an internal bus and linked to an on-screen display (OSD) circuit (12) and to a second memory (10) via a main bus, The video apparatus comprises means for realising a DMA transfer between the first memory (8) and the second memory (10). The invention also proposes a process for controlling such a video apparatus.