发明名称 Apparatus and method of processing signaling bits of integrated services digital network signals
摘要 A time slot interchanger (10) includes a D-channel processing device (30). The D-channel processing device (30) includes a main memory (32), a D-channel memory (34), and a D-channel assembler (36). The main memory (32) receives telephony data and signaling traffic from a subscriber in the form of integrated services digital network signals. Two-bit D-channel signaling portions of each integrated services digital network signals are extracted and placed into the D-channel memory (34). The D-channel assembler (36) assembles the two-bit D-channel signaling portions into eight-bit digital signal level zero (DS0) signals. The eight-bit DS0 signals are stored in the D-channel memory (34) for subsequent transfer with selected telephony data traffic from the main memory (32) over a synchronous optical network link.
申请公布号 US6452951(B1) 申请公布日期 2002.09.17
申请号 US19960775131 申请日期 1996.12.31
申请人 ALCATEL USA SOURCING, L.P. 发明人 LE PHU SON;BHADARE AJAIB S.;TRINH LAC X.
分类号 H04J3/12;H04Q11/04;(IPC1-7):H04J3/22 主分类号 H04J3/12
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