发明名称 |
Optimized burn-in for fixed time dynamic logic circuitry |
摘要 |
A system and method for ensuring comprehensive testing coverage of components within a dynamic logic macro during a burn-in test cycle. Burn-in testing is initiated within dynamic logic circuit having a dynamic logic block and a self-reset loop for generating a reset signal. A multiple phase burn-in test input is applied to the self-reset loop for modifying the duration of the reset signal during burn-in testing, such that the components within the dynamic logic macro are adequately stressed during the burn-in test cycle.
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申请公布号 |
US6453258(B1) |
申请公布日期 |
2002.09.17 |
申请号 |
US19990465176 |
申请日期 |
1999.12.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
AOKI NAOAKI;DHONG SANG HOO;SILBERMAN JOEL ABRAHAM;TAKAHASHI OSAMU |
分类号 |
G01R31/28;(IPC1-7):G06F1/04 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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