| 摘要 |
The invention relates to the formation of structures in microelectronic devices such as integrated circuit devices by means of borderless via architectures in intermetal dielectrics. An integrated circuit structure has a substrate, a layer of a second dielectric material positioned on the substrate and spaced apart metal contacts are on the layer of the second dielectric material. The metal contacts have side walls, and a lining of a first dielectric on the side walls; a space between the linings on adjacent metal contact side walls filled with the second dielectric material, a top surface of each of the metal contacts, the linings and the spaces are at a common level. An additional layer of the second dielectric material is on some of the metal contacts, linings and filled spaces. At least one via extends through the additional layer of the second dielectric material and extends to the top surface of at least one metal contact and optionally at least one of the linings.
|
