发明名称 MAGNETIC RANDOM ACCESS MEMORY
摘要 <p>PURPOSE: To accurately generate a reference potential during sensing. CONSTITUTION: A bias voltage generation circuit 21 includes a series circuit composed of a magneto-resistance element Ref imitating a memory cell, and a MOS transistor QN3. The MR ratio of the magneto-resistance element Ref is set to be half of the MR ratio of the magnet-resistance element in the memory cell. An adjustment resistance (r) has a resistance value half of the wiring resistance of a bit line. The gate of a step-down MOS transistor QP1 is connected to the gate of a MOS transistor as a sense current source for the bit line, and both MOS transistors constitute a current mirror circuit. When Vbias is outputted, and a constant current flows to the bias voltage generation circuit 21, a sense current equal to this constant current also flow to the bit line. The potential of the bit line is changed according to the state of the magneto- resistance element in the memory cell.</p>
申请公布号 KR20020071445(A) 申请公布日期 2002.09.12
申请号 KR20010083981 申请日期 2001.12.24
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ITO HIROSHI
分类号 G11C11/14;G11C11/15;G11C11/16;H01L21/8246;H01L27/105;H01L43/08;(IPC1-7):G11C11/15 主分类号 G11C11/14
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