发明名称 |
Field effect transistor and semiconductor device manufacturing method |
摘要 |
A MOS field effect transistor. A field relaxation layer of a gate overlap structure is disposed in contact with a drain region for the purpose of relaxation of the electric field by increasing a distance between the field relaxation layer and a high-density layer. The electric field relaxation can further be promoted because the equipotential lines are bent by a gate insulation film. A punch-through stopper layer of a gate overlap structure is disposed in contact with a source region for suppressing spreading of a depletion layer toward the source region. The length of a gate electrode can be realized in a miniaturized size.
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申请公布号 |
US2002125510(A1) |
申请公布日期 |
2002.09.12 |
申请号 |
US20010964809 |
申请日期 |
2001.09.28 |
申请人 |
OHYANAGI TAKASUMI;WATANABE ATSUO |
发明人 |
OHYANAGI TAKASUMI;WATANABE ATSUO |
分类号 |
H01L21/336;H01L21/8234;H01L21/8238;H01L27/088;H01L27/092;H01L29/08;H01L29/10;H01L29/78;(IPC1-7):H01L29/94 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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