| 摘要 |
A carry-save adder for adding up bits having the same significance, comprising seven inputs (i0, i1, ..., i6) receiving seven bits having respectively the same significance w for the addition thereof. w. The adder has an output (s) for a sum bit of significance w, in addition to two outputs (c1, c2) for two transfer bits of significance 2w and 4w. |
| 申请人 |
INFINEON TECHNOLOGIES AG;HATSCH, JOEL;KOEPPE, SIEGMAR;LACKERSCHMID, EVA;KAMP, WINFRIED;KUENEMUND, RONALD;SOELDNER, HEINZ |
发明人 |
HATSCH, JOEL;KOEPPE, SIEGMAR;LACKERSCHMID, EVA;KAMP, WINFRIED;KUENEMUND, RONALD;SOELDNER, HEINZ |
