发明名称 RECURSIVE CRYPTOACCELERATOR AND RECURSIVE VHDL DESIGN OF LOGIC CIRCUITS
摘要 <p>A method and apparatus (20) for performing cryptographic computations employing recursive algorithms to accelerate multiplication and squaring operations. Products and squares of long integer values (24) are recursively reduced to a combination of products and squares reduced-length integer values in a host processor (22). The reduced-length integer values are passed to a co-processor (24). The values may be randomly ordered to prevent disclosure of secret data.</p>
申请公布号 WO2002071687(A1) 申请公布日期 2002.09.12
申请号 US2002004951 申请日期 2002.02.20
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