发明名称 DYNAMIC SEMICONDUCTOR MEMORY DEVICE CAPABLE OF REARRANGING DATA STORAGE FROM A ONE BIT/ONE CELL SCHEME IN A NORMAL MODE TO A ONE BIT/TWO CELL SCHEME IN A TWIN-CELL MODE FOR LENGTHENING A REFRESH INTERVAL
摘要 In a data holding mode, data storage in a one bit/one cell scheme in a normal operating mode are rearranged into data storage in a twin-cell mode in which data are stored in a one bit/two cell scheme. In the twin-cell mode, two sub word lines are simultaneously driven into a selected state, and storage data of memory cells are read out on both of bit lines in a pair, to perform a sense operation. Thus, the read-out voltage can be increased to improve the data retention characteristics for lengthening a refresh interval, resulting in a reduced power consumption in the data holding mode.
申请公布号 US6449204(B1) 申请公布日期 2002.09.10
申请号 US20010817177 申请日期 2001.03.27
申请人 发明人
分类号 G11C11/407;G11C7/10;G11C11/401;G11C11/403;G11C11/405;G11C11/406;G11C11/408;G11C11/409;G11C29/02;G11C29/04;G11C29/14;(IPC1-7):G11C7/20 主分类号 G11C11/407
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