| 摘要 |
A substrate for use in packaging of a semiconductor chip is disclosed. The upper surface of the substrate comprises a die covering area adapted for receiving the chip, a ground ring and a power ring. The lower surface of the substrate comprises a plurality of first contact pads right under the vicinity of the ground ring and the power ring, and a plurality of second contact pads surrounding the first contact pads. It is noted that the first contact pads are divided into a two groups electrically connected to the ground ring and the power ring, respectively. Preferably, the lower surface of the substrate is further provided with a plurality of dummy pads at a position right under the periphery of the die covering area and a plurality of third contact pads located right under the die covering area.
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