发明名称 Multiplexer with dummy switches in normally off state to increase operating speed
摘要 Provided are first to fourth switch circuits of the same configuration as each other, each connected to complementary bus lines DB and *DB to be precharged to the same potential. In the-first switch circuit, switches 11 and 15 are connected between an input data signal line SI1 and the DB and between an input data signal line *SI1 and the *DB, respectively, and dummy switches 31 and 32 are connected between the SI1 and the *DB and between the *SI1 and the DB, respectively. Switches 11 to 18 are selectively on/off controlled by outputs of a decoder 20, whereas dummy switches 31 to 38 are normally off.
申请公布号 US6449194(B1) 申请公布日期 2002.09.10
申请号 US20010972151 申请日期 2001.10.09
申请人 FUJITSU LIMITED 发明人 AKIYOSHI HIDEO
分类号 G11C11/418;G11C7/10;G11C8/10;G11C11/41;G11C11/417;H03K17/00;(IPC1-7):G11C7/00 主分类号 G11C11/418
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