发明名称 |
Method of selectively forming silicide film of merged DRAM and Logic |
摘要 |
Disclosed is a method of selectively forming a silicide film of merged DRAM logic by which active regions of a logic side are entirely changed into a silicidation state without adding a separate photoresist patterning process even though there exist any regions in which the space between gates is somewhat narrower than in a DRAM cell forming region, and an etch stopper film of SiON material that is needed in the formation of deep contacts can be applied to a MDL process having dual gate in mass production.
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申请公布号 |
US6448130(B1) |
申请公布日期 |
2002.09.10 |
申请号 |
US20010941345 |
申请日期 |
2001.08.29 |
申请人 |
SAMSUNG ELECTRONICS CO. LTD. |
发明人 |
KIM MYOUNG-SOO |
分类号 |
H01L27/108;H01L21/768;H01L21/8238;H01L21/8242;(IPC1-7):H01L21/824 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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