发明名称 Process flow to reduce spacer undercut phenomena
摘要 A process for forming a composite insulator spacer on the sides of a MOSFET gate structure, wherein the underlying component of the composite insulator spacer is comprised of a thin silicon oxide layer obtained via chemical vapor deposition procedures using tetraethylorthosilicate (TEOS), as a source, has been developed. To densify the underlying thin silicon oxide layer an anneal procedure usually performed after implantation of ions used for a lightly doped source/drain region, is delayed and performed after deposition of the thin silicon oxide layer. The anneal procedure is then used for both activation of the lightly doped source/drain ions, and densification of the thin silicon oxide layer. The etch rate of the densified silicon oxide layer, in dilute hydrofluoric acid procedures is now reduced allowing the underlying silicon oxide component, of the composite insulator spacer, to survive subsequent wet clean procedures employing dilute hydrofluoric acid.
申请公布号 US6448167(B1) 申请公布日期 2002.09.10
申请号 US20010027976 申请日期 2001.12.20
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 WANG LING-SUNG;CHEN YING-LIN
分类号 H01L21/336;(IPC1-7):H01L21/476 主分类号 H01L21/336
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