| 摘要 |
1278346 Cyphering systems TELEFONAKTIEBOLAGET L M ERICSSON 8 June 1970 [11 June 1969] 27709/70 Heading H4P An encyphering system comprisse a matrix of switches in which the switches have a onecondition and a zero-condition, with stepping pulse generators arranged to select the switches repeatedly in pseudo-random manner to define by their condition a series of digital signals, and a number of pulse generators equal to half the number of switches which generators are arranged to generate respective pseudo-random series of binary ones and zeros and have two outlets each, these outlets being arranged so that the output signal of one outlet is inverted relatively to the output signal of the other outlet, the outlets being connected to respective switches of the matrix to control the condition thereof so that the number of switches with zero-condition will always be equal to the number of switches with one-condition. By this means, although the distribution is changed, the numbers of Os and is are always equal. The matrix of switches M comprises 16 AND gates a11-a44 connected to an output OR gate E. The matrix is stepped by generators X1, X2, Y1, Y2 each of which generates a pseudo random series of differing lengths, by means of say a feedback shift register of maximum length type, which are stepped by a clock KG having a frequency f1. Generators X1 &c. together produce a four digit binary number. A further pseudo random generator comprises pulse generators PG1-PG8 stepped at a frequency f2 feeding the third inlet of AND gates a11-a44 via a permuting network P which provides a selectable key combination. With switches SA, SB in their alternative positions, pulses from clock KG pass through a further pseudo-random generator having pulse generators PG11-PG13 stepped at a frequency f1 each producing a different pseudo random series and connected to AND gate O1 which will stop generators PG1-PG8 with an average frequency f1/8 with the interval between pulses varying at random, thus altering the content of matrix M similarly. In another embodiment each of pulse generators PG1-PG8 can be replaced separately by a flip-flop V1-V8 constituting successive stages of a shift register S which can be stepped by a frequency f3, for example the ciphered pulse train. The matrix in this case is fed through bi-stable flip-flops V11-V44 and switched via AND circuits 0-100 to 0-161. As an alternative to the outputs E being combined in an OR circuit to produce a single output U, a sub-group of switches may be selected simultaneously to operate for example a non-binary signal.
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