发明名称 SINGLE EVENT UPSET COMPENSATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To solve such a problem that in a conventional single event upset compensating circuit, as three flip-flops being connected in parallel and a majority circuit are provided to hold one bit data, redundancy is large and occupancy area on a semiconductor device is large. SOLUTION: A single event upset compensating circuit is provided with two data processing sections 21, 22 provided with means 9, 10, 13 generating a test bit for input data of a flip-flop, means 9, 10, 11 generating a test bit for output data, and an error detecting means 12 discriminating an error by inputting both test bits, and the data processing sections outputting output data in accordance with error discrimination are switched.
申请公布号 JP2002251898(A) 申请公布日期 2002.09.06
申请号 JP20010049275 申请日期 2001.02.23
申请人 MITSUBISHI ELECTRIC CORP 发明人 YAMAMOTO TETSUSABURO
分类号 G01R31/28;G11C19/00;G11C19/28;G11C29/00;G11C29/42 主分类号 G01R31/28
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