发明名称 LAMINATED CHIP-TYPE VARISTOR
摘要 <p>PROBLEM TO BE SOLVED: To constitute a highly reliable low-cost laminated chip-type varistor by preventing the surface of its elemental body from eroding by an acidic plating solution and the occurrence of leakage currents caused by drops in surface resistance. SOLUTION: This laminated chip type varistor is provided with the elemental body 10, constituted by alternately laminating internal electrodes 1a, 1b, etc., and varistor layers 2a, 2b, etc., upon another and end-section electrodes 11 and 12 formed by coating base electrodes 11a and 12a electrically connected to the internal electrodes 1a, 1b, etc., of the elemental body 10 with plated coating films 11b, 11c, 12b, and 12c at both end sections of the elemental body 10. The body 10 is made of a composition, prepared by mixing praseodymium oxide, chromium oxide, and cobalt oxide in a varistor porcelain composition, containing zinc oxide as the main ingredient. The porcelain composition contains cobalt oxide(CoO) in the amount of 3.0-20.0 mol, SiO2 in an amount of 0.001 wt.%, and CaCO3 in the amount of 0.004 wt.%, and SiO2 and CaCO3 are contained as accessory ingredients.</p>
申请公布号 JP2002252105(A) 申请公布日期 2002.09.06
申请号 JP20010046337 申请日期 2001.02.22
申请人 TDK CORP 发明人 ABE TAKEHIKO
分类号 H01C7/10;(IPC1-7):H01C7/10 主分类号 H01C7/10
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