发明名称 MULTILAYER WIRING BOARD AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To solve the problem raised by a conventional build up method that, when via-hole conductors have small diameters, connection reliability between the conductors and conductor wiring layers drops. SOLUTION: A multilayer wiring board is provided with an insulating substrate 11 formed by laminating insulating layers 14 containing a thermosetting resin a plurality of conductor wiring layers 12 formed on and/or in the substrate 11, and the via-hole conductors 13 formed by charging a conductor component in via holes formed through the insulating layers 14 for electrically connecting at least two conductor wiring layers 12 formed in different layers to each other. Recesses 17 are formed at a connecting part of the via-hole conductor 13 and at least one conductor wiring layer 12 connected through the via-hole conductors 13, and the via-hole conductors 13 are coupled with the recesses 17.
申请公布号 JP2002252465(A) 申请公布日期 2002.09.06
申请号 JP20010050979 申请日期 2001.02.26
申请人 KYOCERA CORP 发明人 OTA KENICHI;NISHIMOTO AKIHIKO;SASAMORI RIICHI
分类号 H05K3/46;H01L23/12;(IPC1-7):H05K3/46 主分类号 H05K3/46
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