| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of fabricating a semiconductor device by which a threshold value voltage Vth can be lowered by realizing a surface channel CMOS device both in nMOS and pMOS. SOLUTION: This method includes a step of forming a P-well and an N-well on a semiconductor device and defining an n-MOS area and a p-MOS area, a step of forming a first gate insulation film in the n-MOS area and a second gate insulation film in the p-MOS area respectively, a step of forming a first (Tix Aly )1-z Nz film on the first gate insulation film and a second (Tix Aly )1-z Nz film on the second insulation film respectively, a step of forming a first metal gate electrode on the first (Tix Aly )1-z Nz film and a second metal gate electrode on the second (Tix Aly )1-z Nz film, and a step of forming a p-type source/drain junction on the semiconductor substrate of the p-MOS area.
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