发明名称 Memory component with multiple transfer formats
摘要 A memory component, on a single integrated circuit, operated as a slave to an external master, includes a RAM, one or more configuration registers, data formatting logic, and associated control logic. The behavior of the memory component, and in particular the selection of a burst transfer format, is controllable via configuration register bits in the one or more configuration registers. Specifically, based on a format selection specified by the configuration bits, the control logic determines the sequence-length of the data transfers between the RAM and the external master. Other than the sequence-length, the data is not otherwise altered during the data transfers.
申请公布号 US2002124153(A1) 申请公布日期 2002.09.05
申请号 US20010022421 申请日期 2001.12.20
申请人 LITAIZE DANIEL;SALINIER JEAN-CLAUDE;MZOUGHI ABDELAZIZ;ELKHLIFI FATIMA-ZAHRA;LALAM MUSTAPHA;SAINRAT PASCAL 发明人 LITAIZE DANIEL;SALINIER JEAN-CLAUDE;MZOUGHI ABDELAZIZ;ELKHLIFI FATIMA-ZAHRA;LALAM MUSTAPHA;SAINRAT PASCAL
分类号 G06F12/08;G06F15/80;G11C7/10;(IPC1-7):G06F15/00 主分类号 G06F12/08
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