| 摘要 |
A thread manager makes a request to a resource manager for a hardware resource needed for execution of a thread representative of a function of a logical unit, the resource manager allocates the resource in response to the request, and the thread manager controls an execution state of the thread in accordance with a result of the allocation. The thread and resource managers conduct the request, the allocation and the control repeatedly in cooperation with each other until the execution of the thread reaches completion, thus achieving a simulation of the operation of the logical unit. Accordingly, through the operation simulation, it is possible to make the confirmation of the function and the evaluation of an architecture at an initial stage of the design of the logical unit, and further to cope flexibly with an alteration of the architecture by means of a minimum change of description.
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