| 摘要 |
In a method for computer-aided design of a circuit, a hardware description code of the circuit is created using logical circuit blocks, each circuit block being allocated a supply voltage. The hardware description code is transformed into a net list that contains logical cells and their connections. A specific supply voltage is assigned to each cell by a unique identifier. Afterward, a time sequence analysis of the circuit is performed taking account of the identifiers of the cells.
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