Computer memory arrangement, such as a bust-flash memory, has buffer memories for both command and data memories to speed operation of a bus interface

摘要

Memory arrangement with a programmable memory and a buffer memory assigned to this first memory, in which following a command access at least one of the following commands is entered in the buffer memory, while a second buffer memory is provided to which sequential data is written following a first data access. An Independent claim is made for a method for reading from a memory arrangement.