发明名称 Method of fabricating a self-aligned shallow trench isolation
摘要 A method of fabricating a self-aligned shallow trench isolation. A mask layer, two deep trenches and two internal electrodes of a capacitor are sequentially formed on a substrate. Two conductive layers are used to completely fill the two deep trenches. Then, two spacers are formed on exposed sides of the two conductive layers, and two doped regions are formed in a portion of the substrate located next to the two conductive layers. A patterned photoresist layer is formed to expose at least the spacers located in between the two deep trenches and the mask layer. The photoresist layer and the spacers are utilized as masks to etch away the exposed mask layer. The photoresist layer is utilized again as a mask to etch the exposed spacers and a portion of the exposed substrate. Sequentially, a remained portion of the photoresist layer and a portion of the conductive layers are removed. A remained mask layer is used as a mask to remove a portion of the exposed substrate, and a trench is thus formed. Finally, a shallow trench isolation is formed in the trench.
申请公布号 US2002123208(A1) 申请公布日期 2002.09.05
申请号 US20020122585 申请日期 2002.04.15
申请人 UNITED MICROELECTRONICS CORP. 发明人 LEE CHIU-TE
分类号 H01L21/762;H01L21/8242;(IPC1-7):H01L21/823;H01L21/336;H01L21/76;H01L29/00 主分类号 H01L21/762
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