发明名称 Phase lock loop circuit and optical repeating apparatus, optical terminal apparatus, and optical communication system having the same
摘要 According to a PLL circuit of the present invention, an output of a phase comparator is adjusted according to a space-to-mark transition-probability of an input signal so that an output of a voltage controlled oscillator has a predetermined frequency and phase. Therefore, even when a phase of a timing clock is set other than at 0, an output of the PLL circuit can be kept at the set phase, irrespective of the space-to-mark transition-probability. By using the PLL circuit as such in an optical communication apparatus and an optical communication system, a discrimination point can be kept almost fixed, and therefore, it is possible to lower an error rate.
申请公布号 US2002121937(A1) 申请公布日期 2002.09.05
申请号 US20020128672 申请日期 2002.04.23
申请人 FUJITSU LIMITED 发明人 MARUTANI MASAZUMI;YAMAMOTO TAKUJI;KUWATA NAOKI;YAMASHITA KATSUYA
分类号 H03L7/08;H03L7/081;H03L7/087;H03L7/12;H04B10/158;H04B10/16;H04B10/17;H04L7/033;(IPC1-7):H03L7/00 主分类号 H03L7/08
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