发明名称 Image processing apparatus
摘要 An image processing apparatus includes a decoding circuit block decoding a coded image input signal specified by NTSC system with a frame rate of the NTSC system and writing a decoded image signal in an image memory as image data, and a display-image producing circuit block producing a display image data by reading the image data from the image memory with a frame rate specified by PAL system, thereby achieving the frame rate transformation from the NTSC system to PAL system, and at this time, carrying out the skipping for display at every one extent field.
申请公布号 US6445419(B1) 申请公布日期 2002.09.03
申请号 US19990260871 申请日期 1999.03.02
申请人 NEC CORPORATION 发明人 SANPEI TATSUYA
分类号 H04N7/32;H04N7/01;H04N7/26;H04N7/50;(IPC1-7):H04N7/01 主分类号 H04N7/32
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