发明名称 |
Digital phase locked loop for different frequency bands |
摘要 |
For controlling frequency and phase of an output clock signal dependent on a reference signal, a digital phase locked loop comprises a ring oscillator connected to a switch-over unit for generating the output clock signal. The ring oscillator has a plurality of serially arranged delay units. A phase comparator for comparing the phase of the reference signal and of the output clock signal. At least one switchable frequency divider unit is provided between the phase comparator and the output clock signal. A control unit controls the ring oscillator frequency by cut-in or cut-outs of delay units with the assistance of the switchover unit.
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申请公布号 |
US6445252(B1) |
申请公布日期 |
2002.09.03 |
申请号 |
US20000670165 |
申请日期 |
2000.09.26 |
申请人 |
SIEMENS AKTIENGESELLSCAFT |
发明人 |
EILKEN JENS PETER;SIEBERT HARRY |
分类号 |
H03L7/099;H03L7/18;H04J3/07;(IPC1-7):H03L7/087 |
主分类号 |
H03L7/099 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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