发明名称 |
Edge-triggered latch with balanced pass-transistor logic trigger |
摘要 |
An edge-triggered latch that incorporates pass-transistor logic (PTL) in the data and clock generation paths. In accordance with one embodiment, an edge-triggered latch includes a data input and at least one data path PTL transistor that passes data from the data input into a storage node in response to a latch trigger signal. A latch trigger circuit generates the latch-trigger signal in response to a clock signal transition.
|
申请公布号 |
US6445217(B1) |
申请公布日期 |
2002.09.03 |
申请号 |
US20010810026 |
申请日期 |
2001.03.15 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
KOJIMA NOBUO;NOWKA KEVIN JOHN;WEN HUAJUN |
分类号 |
H03K3/037;H03K3/356;(IPC1-7):H03F3/45 |
主分类号 |
H03K3/037 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|