发明名称 Method of manufacturing a multi-layered wiring structure for interconnecting semiconductor devices by patterning resist and antireflective films to define wiring grooves
摘要 After a contact hole is filled with an antireflection film and a resist film, the resist film is patterned such that the resist film of an area larger than the opening of the portion where the contact hole is to be formed is left above the contact hole. The antireflection film is removed with the patterned resist film used as a mask, followed by forming a second interlayer film on the entire surface. The second interlayer film is planarized so as to expose at least the upper surface of the resist film to the outside. Then, the resist film and the antireflection film are removed so as to form a contact hole and a groove.
申请公布号 US6444570(B2) 申请公布日期 2002.09.03
申请号 US20010803895 申请日期 2001.03.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHIBATA HIDENORI
分类号 H01L21/768;(IPC1-7):H01L21/32 主分类号 H01L21/768
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