发明名称 |
Self-modifying synchronization memory address space and protocol for communication between multiple busmasters of a computer system |
摘要 |
A computer system provides a self-modifying synchronization memory address space and protocol for communication between multiple busmasters. In one computer system embodiment, the self-modifying synchronization memory address space is provided in a memory controller embedded in a peripheral device of the computer system such as a bridge that provides central, high speed access by a busmaster to the memory controller without accessing a host bus. The synchronization memory address space includes a set of semaphore memory cells mapped to shared critical resources in the computer system. The semaphore memory cell allows for exclusive access by a busmaster to a shared critical resource by switching itself from an idle state to a busy state responsive to a first read operation by a busmaster. In the busy state of the semaphore memory cell, a busy state is communicated to other busmasters which attempt to read the semaphore memory cell. Ownership of the semaphore memory cell is thus achieved using a single operation by a busmaster. The properties of the self-modifying synchronization memory address space and the semaphore memory cell thus eliminate the need for assertion of a bus locking signal to achieve exclusive access for a busmaster to a shared critical resource. These properties also eliminate the need for host processor intervention in accessing a shared critical resource when a busmaster is a PCI master.
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申请公布号 |
US6446149(B1) |
申请公布日期 |
2002.09.03 |
申请号 |
US19980033964 |
申请日期 |
1998.03.03 |
申请人 |
COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P. |
发明人 |
MORIARTY MICHAEL P.;BONOLA THOMAS J.;WALRATH CRAIG A.;SHAVER CHARLES N. |
分类号 |
G06F15/167;(IPC1-7):G06F15/16 |
主分类号 |
G06F15/167 |
代理机构 |
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