发明名称 Method to reduce emitter to base capacitance and related structure
摘要 According to a disclosed embodiment, a base region is grown on a transistor region. A dielectric layer is next deposited over the base region. The dielectric layer can comprise, for example, silicon dioxide, silicon nitride, or a suitable low-k dielectric. Subsequently, an opening is fabricated in the dielectric layer, and an emitter layer is formed on top of the dielectric layer and in the opening. Thereafter, an anisotropic polymerizing etch chemistry is utilized to etch the emitter layer down to a first depth, forming an emitter region in the opening. Next, a non-polymerizing etch chemistry having isotropic components is used to create a notch in the dielectric layer below the emitter region. The formation of the notch reduces the overlap area of a capacitor that forms between the emitter region and the base region, which translates to a lower level of emitter to base capacitance.
申请公布号 US6444535(B1) 申请公布日期 2002.09.03
申请号 US20010852183 申请日期 2001.05.09
申请人 NEWPORT FAB, LLC 发明人 SCHUEGRAF KLAUS F.
分类号 H01L21/331;H01L29/08;H01L29/737;(IPC1-7):H01L21/331 主分类号 H01L21/331
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