发明名称 Accelerated testing method and circuit for non-volatile memory
摘要 An accelerated test for a non-volatile memory. A threshold voltage variation standard for assessment is selected. A set of negative gate bias voltages is applied to the gate terminals of the non-volatile memory to conduct the accelerated testing and obtain a test result. A curve relating lifetime and negative gate bias voltage is derived from the test result. According to the threshold voltage variation standard, the lifetime of the non-volatile memory is found. A word line negative gate bias voltage generator is coupled to a word line driver to apply a set of negative gate bias voltages to the gate terminals of programmed memory cells and conduct an accelerated testing.
申请公布号 US6445614(B1) 申请公布日期 2002.09.03
申请号 US20010930745 申请日期 2001.08.14
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 TSAI WEN-JER;ZOUS NIAN-KAI;WANG TA-HUI
分类号 G11C29/50;(IPC1-7):G11C16/06;G11C7/00 主分类号 G11C29/50
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