| 摘要 |
PROBLEM TO BE SOLVED: To provide a ultra-thin channel thin-film transistor, with which source/ drain resistance is reduced, manufacture is simple and no alignment error occurs at patterning of a gate, even when a polycrystalline silicon pad film is not patterned by photolithography. SOLUTION: This thin-film transistor includes an ultra-thin polycrystalline silicon film formed on a substrate, a gate film, a gate dielectric film positioned between the gate film, and the ultra-thin polycrystalline silicon film and a spacer positioned on a sidewall of the gate film, and is constituted by a gate structure formed on the ultrathin polycrystalline silicon film and a conducting film formed on the gate film and the ultra-thin polycrystalline and positioned adjacent to the spacer. The conducting film is a film, formed by a selective deposition mechanism by utilizing the difference between the silicon surface and the spacer, for example, in-situ doped SiGe.
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